What is an erasable editable logic device?

An Erasable Programmable Logic Device (EPLD) is an integrated circuit that includes a series of programming logic devices that do not need to be reconnected. Circuit logic function description The description of logic function of PLD device is generally divided into schematic diagram description and hardware description language description. Schematic diagram description is an intuitive and simple method, which can realize the function of existing small-scale integrated circuit directly by PLD device, rather than describing the existing circuit by language. Hardware description language description is another description method of programmable device design, language description may accurately and succinctly represent the logic function of the circuit, now widely used in the design process of PLD, and there is a more favorable trend, commonly used hardware description language ABEL,VHDL language, wherein ABEL is a simple hardware description language, It supports Boolean equation, truth table, state machine and other logical descriptions, and is suitable for the description of counters, decoders, operation circuits, comparators and other logical functions. VHDL language is a kind of behavior description language, its programming structure is similar to the C language in the computer, in the description of complex logic design, very concise, with strong logic description and simulation capabilities, is the mainstream of future hardware design languages.

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