8T49N222B-101NLGI New and Original DIP Electronic Components Integrated Circuit in stock for IC Chip 8T49N222B-101NLGI
|Category||Integrated Circuits (ICs)|
|Mfr||Renesas Electronics America Inc|
|PLL||Yes with Bypass|
|Input||HCSL, LVDS, LVHSTL, LVPECL|
|Number of Circuits||1|
|Ratio – Input:Output||2:2|
|Differential – Input:Output||Yes/Yes|
|Frequency – Max||125MHz|
|Voltage – Supply||2.375V ~ 3.465V|
|Operating Temperature||-40°C ~ 85°C|
|Mounting Type||Surface Mount|
|Package / Case||48-VFQFN Exposed Pad|
|Supplier Device Package||48-VQFN (7×7)|
|Base Product Number||8T49N222|
Documents & Media
|PCN Obsolescence/ EOL||Mult Dev EOL 19/Jan/2022|
|PCN Assembly/Origin||VFQFPN 21/Dec/2016|
|HTML Datasheet||Timing Fabric Overview|
Environmental & Export Classifications
|RoHS Status||ROHS3 Compliant|
|Moisture Sensitivity Level (MSL)||3 (168 Hours)|
|REACH Status||REACH Unaffected|
Infineon has a broad portfolio of clock generators with frequency support of 700 MHz and RMS phase jitter of less than 0.7 ps. They support a host of value-added features such as VCXO, Spread Spectrum and Output Phase Alignment, along with supporting reference clocks for popular interface standards such as PCIe 1.0/2.0/3.0, 10 GbE, SATA 1.0/2.0 and USB 1.0/2.0/3.0. We have commercial, industrial and automotive-grade products.
Clock generators can be broadly classified into two categories: EMI Reduction (Spread-Spectrum capability), and Non-EMI Reduction. Target applications for these devices include automotive, industrial, consumer, and networking.
Consumer devices are becoming more feature-rich and connected. Sharing high-resolution media content requires faster data transfer standards, and devices that can support multiple data standards, each with specific timing requirements. This is precisely why we designed the CY274x High Performance Clock Generator. It meets the timing requirements of car infotainment systems, medical equipment, multi-function printers, media broadcast servers, test equipment, camera systems, aerospace and defense, and many more applications. The device is AEC-Q100 Qualified.
A frequency-selective frequency multiplier can be construct with a PLL system by inserting frequency divider inside the feedback between the phase detector input and the VCO output. Figure below shows the schematic diagram of low-frequency synthesizer with a programmable three decades divider circuit.
The frequency-divider modulus N have value between 3 to 999 with single steps increment. In locked condition, the comparator and signal are at same frequency that f=N*1kHZ.So we have a frequency synthesizer with 3KHZ to 999 KHZ range with 1-KHZ increment, which can be programed by the switch position of the divide-by-n counter.
This circuit uses phase comparator II because a frequency synthesizer shouldn’t lock on harmonics of the signal-input reference frequency. We can’t use phase comparator I because it does lock on harmonics. Phase comparator II correspond to this application because the active factor of the output of the divide-by-n frequency divider is not 50%. The VCO is set by Phase comparator II,to cover a range of 0 MHz to 1.1 MHz. This application have two-pole of the LPF. To faster locking for step changes in frequency this application have tag-lead filter. [Schematic diagram source: Texas Instruments Application Report]